SI-Aware Vias and Contact Pads Layouts

Y. Cheng, K. Chang, C. Liu and R. Wu, "SI-Aware Vias and Contact Pads Layouts and L--R Equalization Technique for 12 Gb/s Backplane Serial I/O Interconnections," in IEEE Transactions on Electromagnetic Compatibility, vol. 55, no. 6, pp. 1284-1292, Dec. 2013.

Notes:

• Introduction
• "reflective noise." -- could this be a reference to the Orlandi 2010 paper?
• mentions issues with back plane connectors
• mentions studies that claim to improve impedance but neglect system performance improvements like the eye diagram.
• vias that create unexpected resonances!
• S. Deng J. Mao T. H. Hubing J. Fun J. L. Knighten N. W. Smith "Effects of open stubs associated with plated throughhole vias in backpane designs" Proc. IEEE Int. Symp. Electromagn. Compat. pp. 1017-1022 2004-Aug.-9–13.
• They did an excellent job of motivating their subject here.
• II
• A. Patterned Ground Structure for Contact Pad
• avoid multiple reflections, 
• "To eliminate the parasitic capacitive loading of the contact pads, one remedy is to etch the reference plane under the contact pad region.
• B. PTH Via Design with Capsule-Shaped Anitpad
• III Equalizer Design
• A. New Equalizer Design Using Reflections for Via Stubs!
• I think that their approach isn't wideband.  Their frequency domain plots only go up to 2 GHz.

Overall, well written paper with some solid suggestions, simulations and experiments.